NOVA RISC-V computer
A two-core RISC-V computer on the Kria KR260, with a small custom operating system and a fixed-point GPU in the FPGA fabric.
- Hardware
- Software
NOVA is a two-core RISC-V computer running on my Kria KR260. Open-source VexRiscv cores, connected with LiteX, run a small custom operating system, and a fixed-point GPU in the fabric draws a windowed desktop and a textured 3D cube that a browser viewer displays.
- When
- September 2026
- Where
- Independent project
- Role
- Project lead, board bring-up, and hardware testing
- CPU
- Two VexRiscv RV32IMAFDC cores with an MMU and floating point
- On the board
- Passed a 13-check acceptance run after a full reboot
- Build
- Meets timing at 50 MHz, about 45,000 LUTs
- Tools
- Kria KR260, Vivado, LiteX, VexRiscv, Verilog, SystemVerilog, C, RISC-V assembly, Python
Credit. The CPU cores are VexRiscv (MIT licence), generated with SpinalHDL, and the SoC is assembled with LiteX (BSD licence) and Migen. NOVA is not a from-scratch CPU.
A frame read back from the KR260's video memory: NOVA's desktop with the 3D Studio window open. 640 by 360 pixels, shown enlarged.
How the system is layered
- Desktop and appsWindow manager, Notes, Calculator, process monitor, terminal, 3D Studio
- NOVA OSPreemptive kernel, per-process address spaces, ELF loader, system calls
- Two VexRiscv coresRV32IMAFDC, MMU, caches, floating point
- Fixed-point GPUTwo raster engines, Q16.16 shaders, textures, depth
- LiteX interconnectBoot ROM, timers, interrupts, UART, AXI to DDR
- Kria KR260FPGA fabric. The ARM side loads the design and relays pixels and input
What runs on the board
- Processor. Two VexRiscv cores implementing RV32IMAFDC, with multiply and divide, atomics, compressed instructions, a hardware floating-point unit per core, an Sv32 MMU with machine, supervisor, and user modes, and coherent instruction and data caches.
- System on chip. A LiteX interconnect with boot ROM, SRAM, timers, an interrupt controller, a UART console, and a 64-bit AXI path to the board’s DDR memory.
- Operating system. A custom kernel with timer preemption across both cores, a separate address space for each process, full integer and floating-point context switching, system calls, process launch and kill, a kernel pipe for messages between processes, RAM-backed files, and a static ELF loader, so new programs can be compiled and run without rebuilding the kernel.
- GPU. Two parallel raster engines run vertex and fragment shaders in Q16.16 fixed point, with perspective correction, texture sampling, depth testing, and a double-buffered 640 × 360 frame in RGB565.
- Desktop. A window manager running in user mode, with Notes, Calculator, a process monitor, a terminal, and a 3D Studio window.
The board’s ARM processor loads the design, provides DDR access, and relays pixels and keyboard and mouse input to a browser viewer. It does not render the desktop or run the shaders.
Board acceptance
After a full reboot of the KR260, an acceptance run passed all 13 of its checks, including:
- Processes running on both cores, with both timer interrupt counters advancing.
- Arithmetic, floating-point, RAM-file, and matrix checksums, plus six numerically checked floating-point stress processes.
- A message pipe between processes on different cores.
- A user process that writes to kernel memory is stopped while the shell keeps running.
- Separate data and BSS for independently loaded ELF programs, and rejection of a malformed ELF file.
- An application denied GPU and input access when it lacks permission.
- A full frame read back from the FPGA’s video memory, the calculator answering hardware input, and a shader-rendered frame that changes over time.
The run’s hardware counters reported zero GPU errors and zero DMA capture errors.
The build
The routed design meets timing at 50 MHz with positive slack. It uses about 45,000 LUTs, 364 DSP slices, and 56 of the device’s 64 UltraRAM blocks.
My role
I set the goals for the system, chose a custom operating system over Linux for this version, brought up the KR260, and ran and reviewed the board tests.